The reason they didn't do that is because AMD didn't actually design the K6 architecture. The AMD K6 was actually designed by NexGen, a smaller CPU manufacturer that had developed a Pentium clone a few years before, but used a proprietary socket to avoid paying royalties to Intel. AMD had a K6 project of its own, but it was behind schedule and not working well.It seems like AMD didn't make good choices back then; to be expected considering they had K7 architecture already. I wonder: if AMD bothered to add the new 3D Now! instructions to the plus series why didn't they bother to complete i686 compatiblity?
To get back into the game, AMD purchased NexGen right before that company was going to come out with its own sixth-generation processor. Since AMD had a license for Socket 7 already, they simply took the NexGen design that was already completed, changed the interface to Socket 7, and sold it as the AMD K6.
Adding the CMOV instruction and what Intel called the "dual independent bus" to the design would have caused major delays, if it had even been possible. AMD didn't have the time for that; they needed an answer to the Pentium II and the Cyrix 6x86 right away. Plus, at the time, it was totally unnecessary. That instruction is non-essential (although widely used) even today, and the de-coupling of the memory and cache buses isn't necessary until you get over 400 MHz. AMD solved that problem another way--the full-speed L2 cache on the K6-III.
By the standards of 1997, the K6 architecture was fully i686 compatible. It's only future, out-of-era software that breaks its compatibility.